--
-- VHDL Architecture codec_control2.Group_Dispay.arch
--
-- Created:
--          by - toban963.student (southfork-09.edu.isy.liu.se)
--          at - 08:38:01 10/11/11
--
-- using Mentor Graphics HDL Designer(TM) 2008.1 (Build 17)
--
LIBRARY ieee;
USE ieee.std_logic_1164.all;
USE ieee.std_logic_arith.all;

ENTITY Group_Dispay IS
   PORT( 
      HEX6 : OUT    std_logic_vector ( 6 DOWNTO 0 );
      HEX7 : OUT    std_logic_vector ( 6 DOWNTO 0 )
   );

-- Declarations

END Group_Dispay ;

--
ARCHITECTURE arch OF Group_Dispay IS
BEGIN
  
  HEX7 <= "0100101";
  HEX6 <= "0110000";
  
END ARCHITECTURE arch;

